【Apple】Technical Internship – Silicon Validation [JAPAN]
仕事内容
The intern role will be determined according to individual interest, skill and background. Some general responsibilities may include:
• Working on Lab measurement instruments to acquire data.
• Script coding to control DUT and instruments appropriately.
• Data summary and report.
応募資格(必須経験など)
Minimum Qualifications
• Pursuing MS or PhD in Electrical Engineering.
• Having strong interest in Mixed signal LSI circuit validation such as SerDes, PLL, ADC, etc.
• Proficient at utilizing Lab measurement instruments such as Oscilloscope, Spectrum Analyzer, etc.
• Holding relevant work permit in Japan for the duration of the internship.
Preferred Qualifications
• Having Analog circuit design (schematic capture) and circuit simulation experiences with Cadence Virtuoso.
• Strong communication, written and verbal, skill in Japanese and/or English.
• Having excellent analytical and problem-solving skills.